北京上海成都西安Synopsys物理综合设计方法学和设计工具培训班哪家好哪里有收费情况cst|Aspen Hysys|Matlab|Ansys|IC

上课地点：【深圳分部】：电影大厦(地铁一号线大剧院站)/深圳大学成教院【上海】：同济大学(沪西)/新城金郡商务楼(11号线白银路站) 【北京分部】：北京中山学院/福鑫大楼【南京分部】：金港大厦(和燕路) 【武汉分部】：佳源大厦（高新二路）【成都分部】：领馆区1号（中和大道）【沈阳分部】：沈阳理工大学/六宅臻品【郑州分部】：郑州大学/锦华大厦【广州分部】：广粮大厦【西安分部】：协同大厦【石家庄分部】：河北科技大学/瑞景大厦
最近开课时间(周末班/连续班/晚班）：Synopsys Prime Time 1 培训班：请点击此处咨询在线客服

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　　　　　　　　Synopsys Prime Time 1 培训班

本课程可帮助IC工程师进一步全面系统地理解IC设计概念与方法。培训将采用Synopsys公司相关领域的培训教材，培训方式以讲课和实验穿插进行。

Overview
This workshop shows you how to maximize your productivity when using PrimeTime. You will validate and enhance run scripts, quickly identify and debug your design violations by generating and interpreting timing reports, remove pessimism with path-based analysis, and generate ECO fixing guidance to downstream tools.

Topics include:

Preparing for STA on your design, including investigating and analyzing the clocks that dictate STA results
Validating inherited PrimeTime run scripts
Leveraging the latest PrimeTime best practices to create new run scripts
Identifying opportunities to improve run time
Performing static timing analysis
Providing ECO fixing guidance to downstream tools

Objectives

At the end of this workshop the student should be able to:

Interpret the essential details in a timing report for setup and hold, recovery and removal, and clock-gating setup and hold
Generate timing reports for specific paths and with specific details
Generate summary reports of the design violations organized by clock, slack, or by timing check
Validate, confirm, debug, enhance, and execute a PrimeTime run script
Create a PrimeTime run script based on seed scripts from the RMgen utility
Identify opportunities to improve run time
Create a saved session and subsequently restore the saved session
Identify the clocks, where they are defined, and which ones interact on an unfamiliar design
Reduce pessimism using path-based analysis
Use both a broad automatic flow for fixing setup and hold violations and a manual flow for tackling individual problem paths.

Audience Profile
Design or verification engineers who perform STA using PrimeTime.

Prerequisites
To benefit the most from the material presented in this workshop, students should have:

A basic understanding of digital IC design
Familiarity with UNIX workstations running X-windows
Familiarity with vi, emacs, or other UNIX text editors

Course Outline

阶段一

Does your design meet timing?
Objects, Attributes, Collections
Constraints in a timing report
Timing arcs in a timing report
Control which paths are reported

阶段二

Summary Reports
Create a setup file and run script
Getting to know your clocks
Analysis types and back annotation

阶段三

Additional checks and constraints
Path-Based Analysis and ECO Flow
Emerging Technologies and Conclusion